gic.h

Commit: e6209518 Author: jokerz Raw Copy

/* gic.h — GIC-400 (Generic Interrupt Controller) for Raspberry Pi 5

 * BCM2712 uses GIC-400 at 0xFF840000

 */

#ifndef GIC_H

#define GIC_H

#include <stdint.h>

/* GIC-400 base addresses (BCM2712) */

#define GICD_BASE   0xFF841000UL  /* Distributor */

#define GICC_BASE   0xFF842000UL  /* CPU interface */

/* GIC Distributor registers */

#define GICD_CTLR       (*(volatile uint32_t *)(GICD_BASE + 0x000))

#define GICD_TYPER      (*(volatile uint32_t *)(GICD_BASE + 0x004))

#define GICD_ISENABLER(n) (*(volatile uint32_t *)(GICD_BASE + 0x100 + 4 * (n)))

#define GICD_ICENABLER(n) (*(volatile uint32_t *)(GICD_BASE + 0x180 + 4 * (n)))

#define GICD_IPRIORITYR(n) (*(volatile uint32_t *)(GICD_BASE + 0x400 + 4 * (n)))

#define GICD_ITARGETSR(n)  (*(volatile uint32_t *)(GICD_BASE + 0x800 + 4 * (n)))

#define GICD_ICFGR(n)   (*(volatile uint32_t *)(GICD_BASE + 0xC00 + 4 * (n)))

#define GICD_ICACTIVER(n) (*(volatile uint32_t *)(GICD_BASE + 0x380 + 4 * (n)))

/* GIC CPU interface registers */

#define GICC_CTLR       (*(volatile uint32_t *)(GICC_BASE + 0x000))

#define GICC_PMR        (*(volatile uint32_t *)(GICC_BASE + 0x004))

#define GICC_IAR        (*(volatile uint32_t *)(GICC_BASE + 0x00C))

#define GICC_EOIR       (*(volatile uint32_t *)(GICC_BASE + 0x010))

/* IRQ numbers for BCM2712 */

#define IRQ_TIMER_CNTP  30  /* ARM Generic Timer PPI 14 → IRQ 30 (16+14) */

#define IRQ_UART0       33  /* PL011 UART0 SPI → IRQ 33 (32+1 → check BCM2712 TRM) */

#define IRQ_UART1       34  /* PL011 UART1 (mini UART) */

/* Special IRQ values from GICC_IAR */

#define GIC_IRQ_SPURIOUS 1023

/* Initialize GIC-400 */

void gic_init(void);

/* Enable an IRQ */

void gic_enable_irq(int irq);

/* Disable an IRQ */

void gic_disable_irq(int irq);

/* Acknowledge IRQ (returns IRQ number) */

int gic_acknowledge(void);

/* End of interrupt */

void gic_eoi(int irq);

#endif /* GIC_H */

1	/* gic.h — GIC-400 (Generic Interrupt Controller) for Raspberry Pi 5
2	* BCM2712 uses GIC-400 at 0xFF840000
3	*/
4
5	#ifndef GIC_H
6	#define GIC_H
7
8	#include <stdint.h>
9
10	/* GIC-400 base addresses (BCM2712) */
11	#define GICD_BASE 0xFF841000UL /* Distributor */
12	#define GICC_BASE 0xFF842000UL /* CPU interface */
13
14	/* GIC Distributor registers */
15	#define GICD_CTLR ((volatile uint32_t )(GICD_BASE + 0x000))
16	#define GICD_TYPER ((volatile uint32_t )(GICD_BASE + 0x004))
17	#define GICD_ISENABLER(n) ((volatile uint32_t )(GICD_BASE + 0x100 + 4 * (n)))
18	#define GICD_ICENABLER(n) ((volatile uint32_t )(GICD_BASE + 0x180 + 4 * (n)))
19	#define GICD_IPRIORITYR(n) ((volatile uint32_t )(GICD_BASE + 0x400 + 4 * (n)))
20	#define GICD_ITARGETSR(n) ((volatile uint32_t )(GICD_BASE + 0x800 + 4 * (n)))
21	#define GICD_ICFGR(n) ((volatile uint32_t )(GICD_BASE + 0xC00 + 4 * (n)))
22	#define GICD_ICACTIVER(n) ((volatile uint32_t )(GICD_BASE + 0x380 + 4 * (n)))
23
24	/* GIC CPU interface registers */
25	#define GICC_CTLR ((volatile uint32_t )(GICC_BASE + 0x000))
26	#define GICC_PMR ((volatile uint32_t )(GICC_BASE + 0x004))
27	#define GICC_IAR ((volatile uint32_t )(GICC_BASE + 0x00C))
28	#define GICC_EOIR ((volatile uint32_t )(GICC_BASE + 0x010))
29
30	/* IRQ numbers for BCM2712 */
31	#define IRQ_TIMER_CNTP 30 /* ARM Generic Timer PPI 14 → IRQ 30 (16+14) */
32	#define IRQ_UART0 33 /* PL011 UART0 SPI → IRQ 33 (32+1 → check BCM2712 TRM) */
33	#define IRQ_UART1 34 /* PL011 UART1 (mini UART) */
34
35	/* Special IRQ values from GICC_IAR */
36	#define GIC_IRQ_SPURIOUS 1023
37
38	/* Initialize GIC-400 */
39	void gic_init(void);
40
41	/* Enable an IRQ */
42	void gic_enable_irq(int irq);
43
44	/* Disable an IRQ */
45	void gic_disable_irq(int irq);
46
47	/* Acknowledge IRQ (returns IRQ number) */
48	int gic_acknowledge(void);
49
50	/* End of interrupt */
51	void gic_eoi(int irq);
52
53	#endif /* GIC_H */
54